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Digital systems design: Using verilog with mindtap
Publication details: Delhi Cengage 1 July 2017Edition: 1st EdDescription: 608pISBN:- 9789386650375
| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
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Books
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IIITDM Kancheepuram Library General Stacks | 621.3.049.77 ROT (Browse shelf(Opens below)) | Available | ECE | 0005727 | ||
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Books
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IIITDM Kancheepuram Library General Stacks | 621.3.049.77 ROT (Browse shelf(Opens below)) | Checked out to ASWINRAJ M.(Technical Staff) (045) | ECE | 08/10/2024 | 0005728 | |
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Books
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IIITDM Kancheepuram Library General Stacks | 621.3.049.77 ROT (Browse shelf(Opens below)) | Available | ECE | 0005729 |
Total holds: 0
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| 621.3.049.77 ROT Fundamentals of logic design | 621.3.049.77 ROT Fundamentals of logic design | 621.3.049.77 ROT Fundamentals of logic design | 621.3.049.77 ROT Digital systems design: | 621.3.049.77 ROT Digital systems design: | 621.3.049.77 ROT Digital systems design: | 621.3.049.77 ROT Fundamentals of logic design |
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