| 000 | 00487 a2200121 4500 | ||
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| 020 | _a9780470900550 | ||
| 082 | _a621.3.049.77:004.436.2 FER | ||
| 245 |
_aIntroduction to digital systems:modeling synthesis and simulation using VHDL _cMohammed Ferdjallah |
||
| 260 |
_bJohn Wiley _cc2011 |
||
| 300 | _ax,215p | ||
| 100 |
_aFerdjallah Mohammed _91306 |
||
| 952 |
_p0002744 _40 _00 _bIIITDM _10 _o621.3.049.77:004.436.2 FER _d2012-12-21 _70 _cREF _2udc _gUSD 114.95 _yREF _aIIITDM |
||
| 999 |
_c1280 _d1280 |
||